The desire for faster, cheaper, and more efficient semiconductor components has motivated semiconductor component manufacturers to shrink the sizes of the devices fabricated in a semiconductor chip and place multiple semiconductor chips in a single package typically referred to as a multi-chip module. The semiconductor chips in a multi-chip module can be placed either in a horizontal orientation, i.e., beside each other, or in a vertical orientation, i.e., vertically stacked on top of each other. In a conventional vertically stacked multi-chip module, a first semiconductor chip is attached to a circuit board by adhesive bonding followed by wirebonding bonding pads located on the semiconductor chip to corresponding bonding pads located on the circuit board. A spacer is formed on or attached to the first semiconductor chip and a second semiconductor chip is attached to the spacer. Then bonding pads located on the second semiconductor chip are coupled to corresponding bonding pads located on the circuit board using, for example, a wirebonding process. The spacer must be smaller than the first semiconductor chip to accommodate the wirebonding process. What's more, the spacer is typically smaller than the second semiconductor chip. A drawback with this type of structure is that the portions of the second semiconductor chip that overhang the spacer are pliable or springy. Thus, when the bonding pads located on the overhanging portion of the second semiconductor chip are wirebonded to the corresponding bonding pads located on the circuit board, the pliability of the overhanging portions of the second semiconductor chip weakens the bonds formed to bonding pads on the second semiconductor chip. This bond weakening causes catastrophic device failure.
Accordingly, it would be advantageous to have a multi-chip module and a method for manufacturing the multi-chip module that does not degrade the integrity of the bonds formed to the bonding pads. It would be of further advantage for the method and structure to be cost efficient and suitable for integration with a variety of multi-chip module processes.